clock_prescale_get (3)
NAME
power.hSYNOPSIS
Macros
#define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
Functions
static __inline void __attribute__ ((__always_inline__)) __power_all_enable()
void clock_prescale_set (clock_div_t __x)
Macro Definition Documentation
#define clock_prescale_get() (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
Gets and returns the clock prescaler register setting. The return type is clock_div_t.Note:
- For device with XTAL Divide Control Register (XDIV), return can actually range from 1 to 129. Care should be taken has the return value could differ from the typedef enum clock_div_t. This should only happen if clock_prescale_set was previously called with a value other than those defined by clock_div_t.
Function Documentation
static __inline void __attribute__ ((__always_inline__)) [static]
Author
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